Semiconductor fabrication processes include etching of various materials. As three dimensional structures shrink towards a sub-10 nm node, traditional etching processes face unprecedented challenges. For example, pitch loading becomes a concern as the etch rate is affected by the increasing aspect ratio. The challenges associated with the transport of neutrals and ions to the etch front, the surface reaction rate at etch fronts, and etch product removal from the etch front become prominent as devices shrink.